Methods are explored for efficiently mapping GNSS signal processing techniques to multicore general-purpose processors. The aim of this work is to exploit the emergence of multicore processors to develop more capable software-defined GNSS receivers. It is shown that conversion of a serial GNSS software receiver to parallel execution on a 4-core processor via minimally-invasive OpenMP directives leads to a more than 3.6x speedup of the steady-state tracking operation. For best results with a shared-memory architecture, the tracking process should be parallelized at channel level. A post hoc tracking technique is introduced to improve load balancing when a small number of computationally-intensive signals such as GPS L5 are present. Finally, three GNSS applications enabled by multicore processors are showcased.

 

Cite and download the paper:
Humphreys, T.E., J.A. Bhatti, T. Pany, B.M. Ledvina, B.W. O’Hanlon, "Exploiting Multicore Technology in Software-Defined GNSS Receivers," Proceedings of ION GNSS, The Institute of Navigation, Savannah, Georgia, 2009.